DIGITAL ELECTRONICS

Academic Year 2026/2027 - Teacher: GAETANO PALUMBO

Expected Learning Outcomes

Knowledge of the fundamental digital circuits to realize logic gates and the main digital building blocks, including combinatory and sequential circuits. Development of the main analysis and design strategies for the digital circuits. 

1. Knowledge and understanding: the student will be able to understand the implemntation and the behavior of the various digital circuit, not limited to teh ones treated in the course.

2. Ability to apply knowledge and understanding: the student will be able to analyze and design digital circuits regardless the technology adopted. 

3. Making judgments: the student will be able to choice independently the topological solutions and the most suited design methodologies for teh application under consideration. 

4. Communication and learning skills: Upon completion of the course, the student is expected to acquire the ability to convey the knowledge acquired to their interlocutors in a clear and complete way and will also be able to rework the knowledge to extend it to situations not explicitly addressed, being also able to learn independently.

Course Structure

The course is mainly structured as follows:
  • frontal lessons, for 49 hours, where the fundamental thoretical parts are developped and presented in details; 
  • exercitation, for 45 hours, where the fundamental theory is developped and applied in practical cases. 

Should teaching be carried out in mixed mode or remotely, it may be necessary to introduce changes with respect to previous statements, in line with the programme planned and outlined in the syllabus.

Required Prerequisites

The preliminary knowledge required and indispensable for this course consists of basic electronics concepts. Specifically, knowledge of the operation of MOS devices, and possibly bipolar devices, is essential, as well as basic concepts related to the analysis and design of simple analog electronic circuits. All of this content, however, is generally acquired during a first electronics course (which also covers analog electronics) in a bachelor's degree program.

Attendance of Lessons

Lesson attendance is strongly suggested 

Detailed Course Content

·       MOS models (long and short channel) and layout introduction.

(theory 8 ore, appl./exer. 10 ore)

 

·       Digital circuits parameters and performance.

(theory 4 ore, appl./exer. 2 ore)

 

·       Ratio logic family.

(theory 3 ore, appl./exer.. 3 ore)

 

·       Static CMOS gates and buffer

(theory 9 ore, appl./exer.. 7 ore)

 

·       Pass transistor, Transmission gate and Dynamic logic gates.

(theory 8 ore, appl./ exer.. 7 ore)

 

·       Dynamic power consumption and switching activity.

(theory 2 ore, appl./ exer.. 4 ore) 

 

·       Current mode logic circuits (bipolar and MOS).

(teory 3 ore, appl./ exer.. 3 ore)

 

·       Sequential circuits, registers and counters.

(theory 5 ore, appl./exer.. 4 ore)

 

  • Oscillators, Pulse generators and Schmitt Triggers 

(theory 3 ore, appl./exer.. 3 ore)

 

·       Semiconductor Memories.

(theory 4 ore, appl./exer.. 2 ore)

Contribution of Teaching to the Objectives of the 2030 Agenda for Sustainable Development
The knowledge provided seeks to strengthen the capacities of young people and adults by equipping them with the necessary skills, including technical and vocational competencies, to access employment, engage in decent work, and foster entrepreneurial potential. It further aims to promote sustained, inclusive, and sustainable economic growth by enhancing productivity through diversification, technological upgrading, and innovation, with particular attention to high value-added and labor-intensive sectors. In doing so, it contributes directly to the advancement of Sustainable Development Goals 4 and 8 of the 2030 Agenda.

Textbook Information

1. J. Rabaey, A. Chandrakasan, B.Nikolic, Dital Integrated Circuits (2° edition), Prentice Hall, 2003 

2. N. Weste, D. Harris, CMOS VLSI Design (3° edition), Addison Wesley, 2004. 

3. M. Alioto, G. Palumbo, Model and Design of Bipolar and MOS Current-Mode Logic (CML, ECL and SCL Digital Circuits), Kluwer Academic Publisher, 2005. 

4. M. Alioto, E. Consoli, G. Palumbo, Flip-Flop Design in Nanometer CMOS (High Speed to Low Energy), Springer, December 2014.

Course Planning

 SubjectsText References
1MOS modeling
2Digital circuits parameters and performance
3CMOS logic families
4Current mode logic circuits
5Sequential circuits
6Registers, Counters, Oscillators, Pulse generators, Schmitt Trigger
7Semiconductor Memories

Learning Assessment

Learning Assessment Procedures

Learning assessment is verified through the final exam. This consists of an exams with a written part and an oral one. The wirtten part includes two questions (two exercises like those treated and solved during the lessons) to solve in one hour without the help of textbook or lecture notes. To pass this part it is mandatory to solve both the two questions, if positive the evaluation has a weight of one third on the final one.  The oral part includes three questions on three different course topics and, if positive,  contributes to the final evaluation for two thirds.

To ensure equal opportunities and in compliance with current laws, interested students may request a personal interview in order to plan any compensatory and/or dispensatory measures based on educational objectives and specific needs. Students can also contact the CInAP (Centro per l’integrazione Attiva e Partecipata - Servizi per le Disabilità e/o i DSA) referring teacher within their department.

Finally, learning assessment may also be changed (for example carried out on line), should the conditions require it. 

Examples of frequently asked questions and / or exercises

everything related to the material provided and covered in class can be an exam question