COMPUTER ARCHITECTURE

The course has two goals. It introduces the knowledge of the technologies and methodologies for the digital systems design. A second objective is the understanding of the computer organization, the instruction set architecture, and techniques for an efficient implementation. In this context, the student learns to program in assembly language relative to an educational processor.

Part I Digital Design

1.1 Combinational circuits design

Switching Algebra. Minimum Boolean expressions. Minimization using Karnaugh maps and Quine-McCluckey method.

1.2 Synchronous sequential circuits Design

Introduction to sequential machines. The memory elements. Synthesis of synchronous sequential circuits. Minimization of finite state machines.

1.3 Design of a digital system

Design flow of a digital system. Datapath and control unit. Hardware description Languages. VHDL. Design flow using automatic tools. Entity and architecture. Concurrent and sequential models. Process. Data types. Procedure and funtions. Simulations and synthesis.

Part II Computer architecture

2.1 Computer abstractions and technology

The types of computers and their characteristics. The components of a computer. Computer Organization. Computer performance evaluation. Amdhal’s law.

2.2 The computer language: the Assembly

Instruction Set Architecture. Translation and starting a program: assembler, linker, and loader. MIPS64 Instruction Set Architecture. An educational Instruction Set Simulator for MIPS 64 processor: EDUMIPS. Assembly of EduMIPS64 processor. Arithmetic/logical instructions. Memory access. System calls. Array. String. Procedure calls

2.3 Computer Organization

Sequential organization of a processor. Datapath of a sequential processor. Control unit of a sequential processor.

Organization of pipelined processor.

2.4 The Memory subsystem.

Static and dynamic RAM memories. Asynchronous and synchronous memories. Memory organization.

Cache memories. Block placement policies, block identification, block replacement and write policy. Memory Performance. Techniques for improving cache performance.

[T1] Fummi, Sami, Silvano, “Progettazione digitale”, 2/ed McGraw-Hill

[T2] Patterson, Hennessy, “Struttura e progetto dei calcolatori”, Zanichelli

[T3] Bucci, “Architettura e organizzazione dei calcolatori elettronici: fondamenti”, McGraw-Hill

[T4] On line Course material