COMPUTER ARCHITECTURE

The course presents the fundamental concepts of computing systems.
In the first part the course introduces the techniques and methodologies for the design of digital systems.
In the second part, the course presents the components of a computer and their organization, some instruction set architectures of the processors, some techniques for an efficient implementation of the processors and the memory subsystem.
Furthermore, in order to better understand the functioning of the processor, the course introduces the student to the assembly programming of an educational processor.

Knowledge and understanding
The student will know:

• The basic techniques for the design of combinational and sequential digital circuits.
• Technologies for the design of digital systems at different levels of abstraction.
• The elementary modules of a computer
• The main  instruction set architectures.
• The basic architectures of RISC processors
• The assembly of an RISC processor

Applying knowledge and understanding
The student will be able to:

• Design simple combinational and synchronous sequential circuits
• Evaluate the performance of a computer and the impact of architectural choices on performance
  
• Write programs in the assembly language of a RISC processor

Making judgements

The student will be able to assess the impact of architectural choices on the performance of a computer.

Communication skills

The student will be able to clearly and rigorously present the acquired knowledge and how to apply it for the design and evaluation of simple computing systems.

Learning skills

The student will be able to independently learn:

• Additional basic features of processor architectures
• The assembly of other processors

The teaching will be conducted through lectures, practical exercises, and the study of some cases.

In case the teaching is delivered in a blended or distance mode, necessary variations may be introduced compared to what was previously stated, in order to comply with the planned program as reported in the syllabus.

Attendance is not mandatory but strongly recommended.

Part I Design of Digital Systems

1.1 Design of Combinatorial Networks

Switching Algebra. Minimal Boolean Expressions. Minimization using Karnaugh Maps and Quine-McCluskey Method.

1.2 Design of Synchronous Sequential Networks

Introduction to Sequential Machines. Memory Elements: Flip-Flops. Synthesis of Synchronous Sequential Networks. Minimization of Finite State Machines.

1.3 Designing a Digital System

Design Flow of a Digital System. Datapath and Control Unit.

Part II The Computer

2.1 The Computer: Abstraction and Technologies

Types of Computers and their Characteristics. Components of an Electronic Computer and their Organization. Performance Evaluation of a Computer. Amdahl's Law.

2.2 The Computer Language: Assembly

Instruction Set Architecture of Processors.

Translation and Execution of a Program: Assembler, Linker, and Loader.

MIPS64 Instruction Set Architecture.

An Instruction Set Simulator for the MIPS 64 processor. Logical-Arithmetic Operations. Memory Access. System Calls. Arrays. Strings. Procedure Call. Nested Procedures. Stack.

2.3 Computer Organization

Sequential Organization of a Processor. Datapath of a Sequential Processor. Control Unit of a Sequential Processor.

Pipeline Organization of a Processor. Hazards in the Pipeline. Performance Evaluation of a Pipeline Processor. Techniques for Hazard Detection and Resolution in the Pipeline. Code Scheduling for Hazard Minimization.

2.4 The Memory Subsystem.

Static and Dynamic RAMs. Asynchronous and Synchronous Memories.

Memory Organization.

Cache Memories. Block Placement, Block Identification, Block Replacement, and Write Policies. Performance Evaluation of Memory.

Techniques for Cache Performance Improvement.

[T1] Fummi, Sami, Silvano, “Progettazione digitale”,  2/ed McGraw-Hill

[T2] Patterson, Hennessy, “Struttura e progetto dei calcolatori”, Zanichelli

[T3] Bucci, “Architettura e organizzazione dei calcolatori  elettronici: fondamenti”,  McGraw-Hill

[T4] Materiale fornito dal docente on line

The exam consists of a single written and computer-based test. The exam includes:

• Two questions on logical networks (12 points)
• Development of an assembly program (10 points)
• Multiple-choice questions on performance evaluation and computer architecture (10 points)

To pass the test, a minimum score of 18 points is required.

There are no interim tests.

The assessment of learning may also be conducted remotely if conditions require it.